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zynq-clk-fixes-for-3.11
michal.simek@xilinx.com
97d58aef
·
clk/zynq/clkc: Add CLK_SET_RATE_PARENT flag to ethernet muxes
·
Jul 17, 2013
Unverified
arm: Xilinx Zynq clock fixes for v3.11 - Fix watchdog clock registration - Fix gem clock propagation